Remove qatomic_mips.h: the 3-operand testAndSet is broken
The "previous" value is always 1 when the compare-and-swap succeeded, instead of the previous value. Instead of fixing this, let's just remove this file a bit earlier than the rest. All of them will be removed in Qt 5.7 anyway, so let's leave MIPS atomics to the compiler. Task-number: QTBUG-49168 Change-Id: Idba8c29717f34c70a58fffff14133304595165f5 Reviewed-by: Dmitry Shachnev <mitya57@gmail.com> Reviewed-by: Oswald Buddenhagen <oswald.buddenhagen@theqtcompany.com> Reviewed-by: Marc Mutz <marc.mutz@kdab.com> Reviewed-by: Thiago Macieira <thiago.macieira@intel.com> Reviewed-by: Lisandro Damián Nicanor Pérez Meyer <perezmeyer@gmail.com>bb10
Thiago Macieira
parent
7aba75ffc5
commit
110a8c339f
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@ -1,351 +0,0 @@
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/****************************************************************************
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**
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** Copyright (C) 2015 The Qt Company Ltd.
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** Copyright (C) 2011 Thiago Macieira <thiago@kde.org>
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** Contact: http://www.qt.io/licensing/
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**
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** This file is part of the QtCore module of the Qt Toolkit.
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**
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** $QT_BEGIN_LICENSE:LGPL21$
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** Commercial License Usage
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** Licensees holding valid commercial Qt licenses may use this file in
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** accordance with the commercial license agreement provided with the
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** Software or, alternatively, in accordance with the terms contained in
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** a written agreement between you and The Qt Company. For licensing terms
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** and conditions see http://www.qt.io/terms-conditions. For further
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** information use the contact form at http://www.qt.io/contact-us.
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**
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** GNU Lesser General Public License Usage
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** Alternatively, this file may be used under the terms of the GNU Lesser
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** General Public License version 2.1 or version 3 as published by the Free
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** Software Foundation and appearing in the file LICENSE.LGPLv21 and
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** LICENSE.LGPLv3 included in the packaging of this file. Please review the
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** following information to ensure the GNU Lesser General Public License
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** requirements will be met: https://www.gnu.org/licenses/lgpl.html and
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** http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html.
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**
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** As a special exception, The Qt Company gives you certain additional
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** rights. These rights are described in The Qt Company LGPL Exception
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** version 1.1, included in the file LGPL_EXCEPTION.txt in this package.
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**
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** $QT_END_LICENSE$
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**
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****************************************************************************/
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#ifndef QATOMIC_MIPS_H
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#define QATOMIC_MIPS_H
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#include <QtCore/qgenericatomic.h>
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QT_BEGIN_NAMESPACE
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#if 0
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// silence syncqt warnings
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QT_END_NAMESPACE
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#pragma qt_sync_skip_header_check
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#pragma qt_sync_stop_processing
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#endif
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#define Q_ATOMIC_INT_REFERENCE_COUNTING_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT_TEST_AND_SET_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT_FETCH_AND_STORE_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT_FETCH_AND_ADD_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT32_IS_SUPPORTED
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#define Q_ATOMIC_INT32_REFERENCE_COUNTING_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT32_TEST_AND_SET_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT32_FETCH_AND_STORE_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT32_FETCH_AND_ADD_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_POINTER_TEST_AND_SET_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_POINTER_FETCH_AND_STORE_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_POINTER_FETCH_AND_ADD_IS_ALWAYS_NATIVE
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template <int size> struct QBasicAtomicOps: QGenericAtomicOps<QBasicAtomicOps<size> >
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{
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template <typename T>
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static void acquireMemoryFence(const T &) Q_DECL_NOTHROW;
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template <typename T>
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static void releaseMemoryFence(const T &) Q_DECL_NOTHROW;
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template <typename T>
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static void orderedMemoryFence(const T &) Q_DECL_NOTHROW;
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static inline Q_DECL_CONSTEXPR bool isReferenceCountingNative() Q_DECL_NOTHROW { return true; }
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template <typename T> static bool ref(T &_q_value) Q_DECL_NOTHROW;
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template <typename T> static bool deref(T &_q_value) Q_DECL_NOTHROW;
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static inline Q_DECL_CONSTEXPR bool isTestAndSetNative() Q_DECL_NOTHROW { return true; }
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static inline Q_DECL_CONSTEXPR bool isTestAndSetWaitFree() Q_DECL_NOTHROW { return false; }
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template <typename T> static bool
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testAndSetRelaxed(T &_q_value, T expectedValue, T newValue, T *currentValue = 0) Q_DECL_NOTHROW;
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static inline Q_DECL_CONSTEXPR bool isFetchAndStoreNative() Q_DECL_NOTHROW { return true; }
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template <typename T> static T fetchAndStoreRelaxed(T &_q_value, T newValue) Q_DECL_NOTHROW;
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static inline Q_DECL_CONSTEXPR bool isFetchAndAddNative() Q_DECL_NOTHROW { return true; }
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template <typename T> static
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T fetchAndAddRelaxed(T &_q_value, typename QAtomicAdditiveType<T>::AdditiveT valueToAdd) Q_DECL_NOTHROW;
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};
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template <typename T> struct QAtomicOps : QBasicAtomicOps<sizeof(T)>
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{
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typedef T Type;
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};
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#if defined(Q_CC_GNU)
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#if defined(_MIPS_ARCH_MIPS1) || (!defined(Q_CC_CLANG) && defined(__mips) && __mips - 0 == 1)
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# error "Sorry, the MIPS1 architecture is not supported"
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# error "please set '-march=' to your architecture (e.g., -march=mips32)"
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#endif
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template <int size> template <typename T> inline
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void QBasicAtomicOps<size>::acquireMemoryFence(const T &) Q_DECL_NOTHROW
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{
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asm volatile (".set push\n"
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".set mips32\n"
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"sync 0x11\n"
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".set pop\n" ::: "memory");
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}
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template <int size> template <typename T> inline
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void QBasicAtomicOps<size>::releaseMemoryFence(const T &) Q_DECL_NOTHROW
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{
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asm volatile (".set push\n"
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".set mips32\n"
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"sync 0x12\n"
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".set pop\n" ::: "memory");
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}
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template <int size> template <typename T> inline
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void QBasicAtomicOps<size>::orderedMemoryFence(const T &) Q_DECL_NOTHROW
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{
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asm volatile (".set push\n"
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".set mips32\n"
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"sync 0\n"
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".set pop\n" ::: "memory");
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}
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template<> template<typename T> inline
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bool QBasicAtomicOps<4>::ref(T &_q_value) Q_DECL_NOTHROW
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{
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T originalValue;
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T newValue;
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asm volatile("0:\n"
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"ll %[originalValue], %[_q_value]\n"
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"addiu %[newValue], %[originalValue], %[one]\n"
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"sc %[newValue], %[_q_value]\n"
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"beqz %[newValue], 0b\n"
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"nop\n"
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: [originalValue] "=&r" (originalValue),
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[_q_value] "+m" (_q_value),
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[newValue] "=&r" (newValue)
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: [one] "i" (1)
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: "cc", "memory");
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return originalValue != T(-1);
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}
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template<> template<typename T> inline
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bool QBasicAtomicOps<4>::deref(T &_q_value) Q_DECL_NOTHROW
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{
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T originalValue;
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T newValue;
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asm volatile("0:\n"
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"ll %[originalValue], %[_q_value]\n"
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"addiu %[newValue], %[originalValue], %[minusOne]\n"
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"sc %[newValue], %[_q_value]\n"
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"beqz %[newValue], 0b\n"
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"nop\n"
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: [originalValue] "=&r" (originalValue),
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[_q_value] "+m" (_q_value),
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[newValue] "=&r" (newValue)
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: [minusOne] "i" (-1)
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: "cc", "memory");
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return originalValue != 1;
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}
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template<> template <typename T> inline
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bool QBasicAtomicOps<4>::testAndSetRelaxed(T &_q_value, T expectedValue, T newValue, T *currentValue) Q_DECL_NOTHROW
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{
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T result;
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T tempValue;
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asm volatile("0:\n"
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"ll %[tempValue], %[_q_value]\n"
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"xor %[result], %[tempValue], %[expectedValue]\n"
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"bnez %[result], 0f\n"
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"nop\n"
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"move %[tempValue], %[newValue]\n"
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"sc %[tempValue], %[_q_value]\n"
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"beqz %[tempValue], 0b\n"
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"nop\n"
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"0:\n"
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: [result] "=&r" (result),
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[tempValue] "=&r" (tempValue),
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[_q_value] "+m" (_q_value)
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: [expectedValue] "r" (expectedValue),
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[newValue] "r" (newValue)
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: "cc", "memory");
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if (currentValue)
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*currentValue = tempValue;
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return result == 0;
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}
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template<> template <typename T> inline
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T QBasicAtomicOps<4>::fetchAndStoreRelaxed(T &_q_value, T newValue) Q_DECL_NOTHROW
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{
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T originalValue;
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T tempValue;
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asm volatile("0:\n"
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"ll %[originalValue], %[_q_value]\n"
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"move %[tempValue], %[newValue]\n"
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"sc %[tempValue], %[_q_value]\n"
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"beqz %[tempValue], 0b\n"
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"nop\n"
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: [originalValue] "=&r" (originalValue),
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[tempValue] "=&r" (tempValue),
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[_q_value] "+m" (_q_value)
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: [newValue] "r" (newValue)
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: "cc", "memory");
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return originalValue;
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}
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template<> template <typename T> inline
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T QBasicAtomicOps<4>::fetchAndAddRelaxed(T &_q_value, typename QAtomicAdditiveType<T>::AdditiveT valueToAdd) Q_DECL_NOTHROW
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{
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T originalValue;
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T newValue;
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asm volatile("0:\n"
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"ll %[originalValue], %[_q_value]\n"
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"addu %[newValue], %[originalValue], %[valueToAdd]\n"
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"sc %[newValue], %[_q_value]\n"
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"beqz %[newValue], 0b\n"
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"nop\n"
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: [originalValue] "=&r" (originalValue),
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[_q_value] "+m" (_q_value),
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[newValue] "=&r" (newValue)
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: [valueToAdd] "r" (valueToAdd * QAtomicAdditiveType<T>::AddScale)
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: "cc", "memory");
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return originalValue;
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}
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#if defined(Q_PROCESSOR_MIPS_64)
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#define Q_ATOMIC_INT64_IS_SUPPORTED
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#define Q_ATOMIC_INT64_REFERENCE_COUNTING_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT64_TEST_AND_SET_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT64_FETCH_AND_STORE_IS_ALWAYS_NATIVE
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#define Q_ATOMIC_INT64_FETCH_AND_ADD_IS_ALWAYS_NATIVE
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template<> struct QAtomicOpsSupport<8> { enum { IsSupported = 1 }; };
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template<> template<typename T> inline
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bool QBasicAtomicOps<8>::ref(T &_q_value) Q_DECL_NOTHROW
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{
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T originalValue;
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T newValue;
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asm volatile("0:\n"
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"lld %[originalValue], %[_q_value]\n"
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"addiu %[newValue], %[originalValue], %[one]\n"
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"scd %[newValue], %[_q_value]\n"
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"beqz %[newValue], 0b\n"
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"nop\n"
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: [originalValue] "=&r" (originalValue),
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[_q_value] "+m" (_q_value),
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[newValue] "=&r" (newValue)
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: [one] "i" (1)
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: "cc", "memory");
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return originalValue != T(-1);
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}
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template<> template<typename T> inline
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bool QBasicAtomicOps<8>::deref(T &_q_value) Q_DECL_NOTHROW
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{
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T originalValue;
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T newValue;
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asm volatile("0:\n"
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"lld %[originalValue], %[_q_value]\n"
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"addiu %[newValue], %[originalValue], %[minusOne]\n"
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"scd %[newValue], %[_q_value]\n"
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"beqz %[newValue], 0b\n"
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"nop\n"
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: [originalValue] "=&r" (originalValue),
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[_q_value] "+m" (_q_value),
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[newValue] "=&r" (newValue)
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: [minusOne] "i" (-1)
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: "cc", "memory");
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return originalValue != 1;
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}
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template<> template <typename T> inline
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bool QBasicAtomicOps<8>::testAndSetRelaxed(T &_q_value, T expectedValue, T newValue, T *currentValue) Q_DECL_NOTHROW
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{
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T result;
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T tempValue;
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asm volatile("0:\n"
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"lld %[tempValue], %[_q_value]\n"
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"xor %[result], %[tempValue], %[expectedValue]\n"
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"bnez %[result], 0f\n"
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"nop\n"
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"move %[tempValue], %[newValue]\n"
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"scd %[tempValue], %[_q_value]\n"
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"beqz %[tempValue], 0b\n"
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"nop\n"
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"0:\n"
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: [result] "=&r" (result),
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[tempValue] "=&r" (tempValue),
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[_q_value] "+m" (_q_value)
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: [expectedValue] "r" (expectedValue),
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[newValue] "r" (newValue)
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: "cc", "memory");
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if (currentValue)
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*currentValue = tempValue;
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return result == 0;
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}
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template<> template <typename T> inline
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T QBasicAtomicOps<8>::fetchAndStoreRelaxed(T &_q_value, T newValue) Q_DECL_NOTHROW
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{
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T originalValue;
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T tempValue;
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asm volatile("0:\n"
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"lld %[originalValue], %[_q_value]\n"
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"move %[tempValue], %[newValue]\n"
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"scd %[tempValue], %[_q_value]\n"
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"beqz %[tempValue], 0b\n"
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"nop\n"
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: [originalValue] "=&r" (originalValue),
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[tempValue] "=&r" (tempValue),
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[_q_value] "+m" (_q_value)
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: [newValue] "r" (newValue)
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: "cc", "memory");
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return originalValue;
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}
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template<> template <typename T> inline
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T QBasicAtomicOps<8>::fetchAndAddRelaxed(T &_q_value, typename QAtomicAdditiveType<T>::AdditiveT valueToAdd) Q_DECL_NOTHROW
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{
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T originalValue;
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T newValue;
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asm volatile("0:\n"
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"lld %[originalValue], %[_q_value]\n"
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"addu %[newValue], %[originalValue], %[valueToAdd]\n"
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"scd %[newValue], %[_q_value]\n"
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"beqz %[newValue], 0b\n"
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"nop\n"
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: [originalValue] "=&r" (originalValue),
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[_q_value] "+m" (_q_value),
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[newValue] "=&r" (newValue)
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: [valueToAdd] "r" (valueToAdd * QAtomicAdditiveType<T>::AddScale)
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: "cc", "memory");
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return originalValue;
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}
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#endif // MIPS64
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#else
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# error "This compiler for MIPS is not supported"
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#endif // Q_CC_GNU
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QT_END_NAMESPACE
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#endif // QATOMIC_MIPS_H
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@ -60,8 +60,6 @@
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# include "QtCore/qatomic_armv5.h"
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#elif defined(Q_PROCESSOR_IA64)
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# include "QtCore/qatomic_ia64.h"
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#elif defined(Q_PROCESSOR_MIPS)
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# include "QtCore/qatomic_mips.h"
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#elif defined(Q_PROCESSOR_X86)
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# include <QtCore/qatomic_x86.h>
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