qsimd_p.h: Reorganize and simplify the x86 intrinsics #includes
All of our compilers support #include <immintrin.h>, so we don't need the legacy code that includes the earlier versions. Change-Id: I938b024e38bf4aac9154fffd14f80214d1d744c8 Reviewed-by: Allan Sandfeld Jensen <allan.jensen@qt.io>bb10
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5927acaf65
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9061b7bde0
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@ -177,55 +177,37 @@
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# define QT_FUNCTION_TARGET(x)
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#endif
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#if defined(Q_CC_MSVC) && (defined(_M_AVX) || defined(__AVX__))
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#ifdef Q_PROCESSOR_X86
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/* -- x86 intrinsic support -- */
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# if defined(Q_CC_MSVC) && (defined(_M_X64) || _M_IX86_FP >= 2)
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// MSVC doesn't define __SSE2__, so do it ourselves
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# define __SSE__ 1
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# define __SSE2__ 1
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# endif
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# ifdef __SSE2__
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// #include the intrinsics
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# include <immintrin.h>
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# endif
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# if defined(Q_CC_GNU) && !defined(Q_CC_INTEL)
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// GCC 4.4 and Clang 2.8 added a few more intrinsics there
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# include <x86intrin.h>
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# endif
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# if defined(Q_CC_MSVC) && (defined(_M_AVX) || defined(__AVX__))
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// Visual Studio defines __AVX__ when /arch:AVX is passed, but not the earlier macros
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// See: https://msdn.microsoft.com/en-us/library/b0084kay.aspx
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// SSE2 is handled by _M_IX86_FP below
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# define __SSE3__ 1
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# define __SSSE3__ 1
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# define __SSE3__ 1
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# define __SSSE3__ 1
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// no Intel CPU supports SSE4a, so don't define it
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# define __SSE4_1__ 1
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# define __SSE4_2__ 1
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# ifndef __AVX__
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# define __AVX__ 1
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# define __SSE4_1__ 1
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# define __SSE4_2__ 1
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# ifndef __AVX__
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# define __AVX__ 1
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# endif
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# endif
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#endif
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// SSE intrinsics
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#if defined(__SSE2__) || (defined(QT_COMPILER_SUPPORTS_SSE2) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS))
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#if defined(QT_LINUXBASE)
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/// this is an evil hack - the posix_memalign declaration in LSB
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/// is wrong - see http://bugs.linuxbase.org/show_bug.cgi?id=2431
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# define posix_memalign _lsb_hack_posix_memalign
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# include <emmintrin.h>
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# undef posix_memalign
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#else
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# include <emmintrin.h>
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#endif
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#if defined(Q_CC_MSVC) && (defined(_M_X64) || _M_IX86_FP >= 2)
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# define __SSE__ 1
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# define __SSE2__ 1
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#endif
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#endif
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// SSE3 intrinsics
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#if defined(__SSE3__) || (defined(QT_COMPILER_SUPPORTS_SSE3) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS))
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#include <pmmintrin.h>
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#endif
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// SSSE3 intrinsics
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#if defined(__SSSE3__) || (defined(QT_COMPILER_SUPPORTS_SSSE3) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS))
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#include <tmmintrin.h>
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#endif
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// SSE4.1 intrinsics
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#if defined(__SSE4_1__) || (defined(QT_COMPILER_SUPPORTS_SSE4_1) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS))
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#include <smmintrin.h>
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#endif
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// SSE4.2 intrinsics
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#if defined(__SSE4_2__) || (defined(QT_COMPILER_SUPPORTS_SSE4_2) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS))
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#include <nmmintrin.h>
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# if defined(__SSE4_2__) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS) && (defined(Q_CC_INTEL) || defined(Q_CC_MSVC))
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// POPCNT instructions:
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@ -233,13 +215,8 @@
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// (but neither MSVC nor the Intel compiler define this macro)
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# define __POPCNT__ 1
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# endif
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#endif
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// AVX intrinsics
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#if defined(__AVX__) || (defined(QT_COMPILER_SUPPORTS_AVX) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS))
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// immintrin.h is the ultimate header, we don't need anything else after this
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#include <immintrin.h>
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# if defined(__AVX__) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS) && (defined(Q_CC_INTEL) || defined(Q_CC_MSVC))
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// AES, PCLMULQDQ instructions:
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// All processors that support AVX support AES, PCLMULQDQ
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@ -255,11 +232,6 @@
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# define __F16C__ 1
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# define __RDRND__ 1
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# endif
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#endif
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#if defined(__AES__) || defined(__PCLMUL__) || (defined(QT_COMPILER_SUPPORTS_AES) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS))
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# include <wmmintrin.h>
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#endif
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#define QT_FUNCTION_TARGET_STRING_SSE2 "sse2"
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#define QT_FUNCTION_TARGET_STRING_SSE3 "sse3"
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@ -288,19 +260,7 @@
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#define QT_FUNCTION_TARGET_STRING_RDSEED "rdseed"
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#define QT_FUNCTION_TARGET_STRING_SHA "sha"
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// other x86 intrinsics
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#if defined(Q_PROCESSOR_X86) && ((defined(Q_CC_GNU) && (Q_CC_GNU >= 404)) \
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|| (defined(Q_CC_CLANG) && (Q_CC_CLANG >= 208)) \
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|| defined(Q_CC_INTEL))
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# define QT_COMPILER_SUPPORTS_X86INTRIN
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# ifdef Q_CC_INTEL
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// The Intel compiler has no <x86intrin.h> -- all intrinsics are in <immintrin.h>;
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# include <immintrin.h>
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# else
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// GCC 4.4 and Clang 2.8 added a few more intrinsics there
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# include <x86intrin.h>
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# endif
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#endif
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#endif /* Q_PROCESSOR_X86 */
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// Clang compiler fix, see http://lists.llvm.org/pipermail/cfe-commits/Week-of-Mon-20160222/151168.html
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// This should be tweaked with an "upper version" of clang once we know which release fixes the
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