diff --git a/src/corelib/arch/qatomic_arch.h b/src/corelib/arch/qatomic_arch.h index 3d8312f44c..4b63375d6a 100644 --- a/src/corelib/arch/qatomic_arch.h +++ b/src/corelib/arch/qatomic_arch.h @@ -62,8 +62,6 @@ QT_BEGIN_HEADER # include "QtCore/qatomic_ia64.h" #elif defined(QT_ARCH_MACOSX) # include "QtCore/qatomic_macosx.h" -#elif defined(QT_ARCH_MIPS) -# include "QtCore/qatomic_mips.h" #elif defined(QT_ARCH_PARISC) # include "QtCore/qatomic_parisc.h" #elif defined(QT_ARCH_POWERPC) diff --git a/src/corelib/arch/qatomic_mips.h b/src/corelib/arch/qatomic_mips.h index 8dcf813f3e..848c1d205a 100644 --- a/src/corelib/arch/qatomic_mips.h +++ b/src/corelib/arch/qatomic_mips.h @@ -1,7 +1,7 @@ /**************************************************************************** ** ** Copyright (C) 2012 Nokia Corporation and/or its subsidiary(-ies). -** All rights reserved. +** Copyright (C) 2011 Thiago Macieira ** Contact: http://www.qt-project.org/ ** ** This file is part of the QtCore module of the Qt Toolkit. @@ -42,107 +42,116 @@ #ifndef QATOMIC_MIPS_H #define QATOMIC_MIPS_H +#include + QT_BEGIN_HEADER QT_BEGIN_NAMESPACE -#define Q_ATOMIC_INT_REFERENCE_COUNTING_IS_ALWAYS_NATIVE - -inline bool QBasicAtomicInt::isReferenceCountingNative() -{ return true; } -inline bool QBasicAtomicInt::isReferenceCountingWaitFree() -{ return false; } - -#define Q_ATOMIC_INT_TEST_AND_SET_IS_ALWAYS_NATIVE - -inline bool QBasicAtomicInt::isTestAndSetNative() -{ return true; } -inline bool QBasicAtomicInt::isTestAndSetWaitFree() -{ return false; } - -#define Q_ATOMIC_INT_FETCH_AND_STORE_IS_ALWAYS_NATIVE - -inline bool QBasicAtomicInt::isFetchAndStoreNative() -{ return true; } -inline bool QBasicAtomicInt::isFetchAndStoreWaitFree() -{ return false; } - -#define Q_ATOMIC_INT_FETCH_AND_ADD_IS_ALWAYS_NATIVE - -inline bool QBasicAtomicInt::isFetchAndAddNative() -{ return true; } -inline bool QBasicAtomicInt::isFetchAndAddWaitFree() -{ return false; } - -#define Q_ATOMIC_POINTER_TEST_AND_SET_IS_ALWAYS_NATIVE - -template -Q_INLINE_TEMPLATE bool QBasicAtomicPointer::isTestAndSetNative() -{ return true; } -template -Q_INLINE_TEMPLATE bool QBasicAtomicPointer::isTestAndSetWaitFree() -{ return false; } - -#define Q_ATOMIC_POINTER_FETCH_AND_STORE_IS_ALWAYS_NATIVE - -template -Q_INLINE_TEMPLATE bool QBasicAtomicPointer::isFetchAndStoreNative() -{ return true; } -template -Q_INLINE_TEMPLATE bool QBasicAtomicPointer::isFetchAndStoreWaitFree() -{ return false; } - -#define Q_ATOMIC_POINTER_FETCH_AND_ADD_IS_ALWAYS_NATIVE - -template -Q_INLINE_TEMPLATE bool QBasicAtomicPointer::isFetchAndAddNative() -{ return true; } -template -Q_INLINE_TEMPLATE bool QBasicAtomicPointer::isFetchAndAddWaitFree() -{ return false; } - -#if defined(Q_CC_GNU) && !defined(Q_OS_IRIX) - -#if _MIPS_SIM == _ABIO32 -#define SET_MIPS2 ".set mips2\n\t" -#else -#define SET_MIPS2 +#if 0 +#pragma qt_sync_stop_processing #endif -inline bool QBasicAtomicInt::ref() +#define Q_ATOMIC_INT_REFERENCE_COUNTING_IS_ALWAYS_NATIVE +#define Q_ATOMIC_INT_TEST_AND_SET_IS_ALWAYS_NATIVE +#define Q_ATOMIC_INT_FETCH_AND_STORE_IS_ALWAYS_NATIVE +#define Q_ATOMIC_INT_FETCH_AND_ADD_IS_ALWAYS_NATIVE + +#define Q_ATOMIC_INT32_IS_SUPPORTED +#define Q_ATOMIC_INT32_REFERENCE_COUNTING_IS_ALWAYS_NATIVE +#define Q_ATOMIC_INT32_TEST_AND_SET_IS_ALWAYS_NATIVE +#define Q_ATOMIC_INT32_FETCH_AND_STORE_IS_ALWAYS_NATIVE +#define Q_ATOMIC_INT32_FETCH_AND_ADD_IS_ALWAYS_NATIVE + +#define Q_ATOMIC_POINTER_TEST_AND_SET_IS_ALWAYS_NATIVE +#define Q_ATOMIC_POINTER_FETCH_AND_STORE_IS_ALWAYS_NATIVE +#define Q_ATOMIC_POINTER_FETCH_AND_ADD_IS_ALWAYS_NATIVE + +template<> struct QAtomicIntegerTraits { enum { IsInteger = 1 }; }; +template<> struct QAtomicIntegerTraits { enum { IsInteger = 1 }; }; + +template struct QBasicAtomicOps: QGenericAtomicOps > { - register int originalValue; - register int newValue; - asm volatile(".set push\n" - SET_MIPS2 - "0:\n" + static void acquireMemoryFence(); + static void releaseMemoryFence(); + static void orderedMemoryFence(); + + static inline bool isReferenceCountingNative() { return true; } + template static bool ref(T &_q_value); + template static bool deref(T &_q_value); + + static inline bool isTestAndSetNative() { return true; } + static inline bool isTestAndSetWaitFree() { return false; } + template static bool testAndSetRelaxed(T &_q_value, T expectedValue, T newValue); + + static inline bool isFetchAndStoreNative() { return true; } + template static T fetchAndStoreRelaxed(T &_q_value, T newValue); + + static inline bool isFetchAndAddNative() { return true; } + template static + T fetchAndAddRelaxed(T &_q_value, typename QAtomicAdditiveType::AdditiveT valueToAdd); +}; + +template struct QAtomicOps : QBasicAtomicOps +{ + typedef T Type; +}; + +#if defined(Q_CC_GNU) + +#if defined(_MIPS_ARCH_MIPS1) || (defined(__mips) && __mips - 0 == 1) +# error "Sorry, the MIPS1 architecture is not supported" +# error "please set '-march=' to your architecture (e.g., -march=mips32)" +#endif + +template inline +void QBasicAtomicOps::acquireMemoryFence() +{ + asm volatile ("sync 0x11" ::: "memory"); +} + +template inline +void QBasicAtomicOps::releaseMemoryFence() +{ + asm volatile ("sync 0x12" ::: "memory"); +} + +template inline +void QBasicAtomicOps::orderedMemoryFence() +{ + asm volatile ("sync 0" ::: "memory"); +} + +template<> template inline +bool QBasicAtomicOps<4>::ref(T &_q_value) +{ + register T originalValue; + register T newValue; + asm volatile("0:\n" "ll %[originalValue], %[_q_value]\n" "addiu %[newValue], %[originalValue], %[one]\n" "sc %[newValue], %[_q_value]\n" "beqz %[newValue], 0b\n" "nop\n" - ".set pop\n" : [originalValue] "=&r" (originalValue), [_q_value] "+m" (_q_value), [newValue] "=&r" (newValue) : [one] "i" (1) : "cc", "memory"); - return originalValue != -1; + return originalValue != T(-1); } -inline bool QBasicAtomicInt::deref() +template<> template inline +bool QBasicAtomicOps<4>::deref(T &_q_value) { - register int originalValue; - register int newValue; - asm volatile(".set push\n" - SET_MIPS2 - "0:\n" + register T originalValue; + register T newValue; + asm volatile("0:\n" "ll %[originalValue], %[_q_value]\n" "addiu %[newValue], %[originalValue], %[minusOne]\n" "sc %[newValue], %[_q_value]\n" "beqz %[newValue], 0b\n" "nop\n" - ".set pop\n" : [originalValue] "=&r" (originalValue), [_q_value] "+m" (_q_value), [newValue] "=&r" (newValue) @@ -151,13 +160,12 @@ inline bool QBasicAtomicInt::deref() return originalValue != 1; } -inline bool QBasicAtomicInt::testAndSetRelaxed(int expectedValue, int newValue) +template<> template inline +bool QBasicAtomicOps<4>::testAndSetRelaxed(T &_q_value, T expectedValue, T newValue) { - register int result; - register int tempValue; - asm volatile(".set push\n" - SET_MIPS2 - "0:\n" + register T result; + register T tempValue; + asm volatile("0:\n" "ll %[result], %[_q_value]\n" "xor %[result], %[result], %[expectedValue]\n" "bnez %[result], 0f\n" @@ -167,7 +175,6 @@ inline bool QBasicAtomicInt::testAndSetRelaxed(int expectedValue, int newValue) "beqz %[tempValue], 0b\n" "nop\n" "0:\n" - ".set pop\n" : [result] "=&r" (result), [tempValue] "=&r" (tempValue), [_q_value] "+m" (_q_value) @@ -177,24 +184,108 @@ inline bool QBasicAtomicInt::testAndSetRelaxed(int expectedValue, int newValue) return result == 0; } -inline bool QBasicAtomicInt::testAndSetAcquire(int expectedValue, int newValue) +template<> template inline +T QBasicAtomicOps<4>::fetchAndStoreRelaxed(T &_q_value, T newValue) { - register int result; - register int tempValue; - asm volatile(".set push\n" - SET_MIPS2 - "0:\n" - "ll %[result], %[_q_value]\n" + register T originalValue; + register T tempValue; + asm volatile("0:\n" + "ll %[originalValue], %[_q_value]\n" + "move %[tempValue], %[newValue]\n" + "sc %[tempValue], %[_q_value]\n" + "beqz %[tempValue], 0b\n" + "nop\n" + : [originalValue] "=&r" (originalValue), + [tempValue] "=&r" (tempValue), + [_q_value] "+m" (_q_value) + : [newValue] "r" (newValue) + : "cc", "memory"); + return originalValue; +} + +template<> template inline +T QBasicAtomicOps<4>::fetchAndAddRelaxed(T &_q_value, typename QAtomicAdditiveType::AdditiveT valueToAdd) +{ + register T originalValue; + register T newValue; + asm volatile("0:\n" + "ll %[originalValue], %[_q_value]\n" + "addu %[newValue], %[originalValue], %[valueToAdd]\n" + "sc %[newValue], %[_q_value]\n" + "beqz %[newValue], 0b\n" + "nop\n" + : [originalValue] "=&r" (originalValue), + [_q_value] "+m" (_q_value), + [newValue] "=&r" (newValue) + : [valueToAdd] "r" (valueToAdd * QAtomicAdditiveType::AddScale) + : "cc", "memory"); + return originalValue; +} + +#if defined(_MIPS_ARCH_MIPS64) || defined(__mips64) + +#define Q_ATOMIC_INT64_IS_SUPPORTED +#define Q_ATOMIC_INT64_REFERENCE_COUNTING_IS_ALWAYS_NATIVE +#define Q_ATOMIC_INT64_TEST_AND_SET_IS_ALWAYS_NATIVE +#define Q_ATOMIC_INT64_FETCH_AND_STORE_IS_ALWAYS_NATIVE +#define Q_ATOMIC_INT64_FETCH_AND_ADD_IS_ALWAYS_NATIVE + +template<> struct QAtomicIntegerTraits { enum { IsInteger = 1 }; }; +template<> struct QAtomicIntegerTraits { enum { IsInteger = 1 }; }; + +template<> template inline +bool QBasicAtomicOps<8>::ref(T &_q_value) +{ + register T originalValue; + register T newValue; + asm volatile("0:\n" + "lld %[originalValue], %[_q_value]\n" + "addiu %[newValue], %[originalValue], %[one]\n" + "scd %[newValue], %[_q_value]\n" + "beqz %[newValue], 0b\n" + "nop\n" + : [originalValue] "=&r" (originalValue), + [_q_value] "+m" (_q_value), + [newValue] "=&r" (newValue) + : [one] "i" (1) + : "cc", "memory"); + return originalValue != T(-1); +} + +template<> template inline +bool QBasicAtomicOps<8>::deref(T &_q_value) +{ + register T originalValue; + register T newValue; + asm volatile("0:\n" + "lld %[originalValue], %[_q_value]\n" + "addiu %[newValue], %[originalValue], %[minusOne]\n" + "scd %[newValue], %[_q_value]\n" + "beqz %[newValue], 0b\n" + "nop\n" + : [originalValue] "=&r" (originalValue), + [_q_value] "+m" (_q_value), + [newValue] "=&r" (newValue) + : [minusOne] "i" (-1) + : "cc", "memory"); + return originalValue != 1; +} + +template<> template inline +bool QBasicAtomicOps<8>::testAndSetRelaxed(T &_q_value, T expectedValue, T newValue) +{ + register T result; + register T tempValue; + asm volatile("0:\n" + "lld %[result], %[_q_value]\n" "xor %[result], %[result], %[expectedValue]\n" "bnez %[result], 0f\n" "nop\n" "move %[tempValue], %[newValue]\n" - "sc %[tempValue], %[_q_value]\n" + "scd %[tempValue], %[_q_value]\n" "beqz %[tempValue], 0b\n" "nop\n" - "sync\n" "0:\n" - ".set pop\n" : [result] "=&r" (result), [tempValue] "=&r" (tempValue), [_q_value] "+m" (_q_value) @@ -204,51 +295,17 @@ inline bool QBasicAtomicInt::testAndSetAcquire(int expectedValue, int newValue) return result == 0; } -inline bool QBasicAtomicInt::testAndSetRelease(int expectedValue, int newValue) +template<> template inline +T QBasicAtomicOps<8>::fetchAndStoreRelaxed(T &_q_value, T newValue) { - register int result; - register int tempValue; - asm volatile(".set push\n" - SET_MIPS2 - "sync\n" - "0:\n" - "ll %[result], %[_q_value]\n" - "xor %[result], %[result], %[expectedValue]\n" - "bnez %[result], 0f\n" - "nop\n" + register T originalValue; + register T tempValue; + asm volatile("0:\n" + "lld %[originalValue], %[_q_value]\n" "move %[tempValue], %[newValue]\n" - "sc %[tempValue], %[_q_value]\n" + "scd %[tempValue], %[_q_value]\n" "beqz %[tempValue], 0b\n" "nop\n" - "0:\n" - ".set pop\n" - : [result] "=&r" (result), - [tempValue] "=&r" (tempValue), - [_q_value] "+m" (_q_value) - : [expectedValue] "r" (expectedValue), - [newValue] "r" (newValue) - : "cc", "memory"); - return result == 0; -} - -inline bool QBasicAtomicInt::testAndSetOrdered(int expectedValue, int newValue) -{ - return testAndSetAcquire(expectedValue, newValue); -} - -inline int QBasicAtomicInt::fetchAndStoreRelaxed(int newValue) -{ - register int originalValue; - register int tempValue; - asm volatile(".set push\n" - SET_MIPS2 - "0:\n" - "ll %[originalValue], %[_q_value]\n" - "move %[tempValue], %[newValue]\n" - "sc %[tempValue], %[_q_value]\n" - "beqz %[tempValue], 0b\n" - "nop\n" - ".set pop\n" : [originalValue] "=&r" (originalValue), [tempValue] "=&r" (tempValue), [_q_value] "+m" (_q_value) @@ -257,632 +314,29 @@ inline int QBasicAtomicInt::fetchAndStoreRelaxed(int newValue) return originalValue; } -inline int QBasicAtomicInt::fetchAndStoreAcquire(int newValue) +template<> template inline +T QBasicAtomicOps<8>::fetchAndAddRelaxed(T &_q_value, typename QAtomicAdditiveType::AdditiveT valueToAdd) { - register int originalValue; - register int tempValue; - asm volatile(".set push\n" - SET_MIPS2 - "0:\n" - "ll %[originalValue], %[_q_value]\n" - "move %[tempValue], %[newValue]\n" - "sc %[tempValue], %[_q_value]\n" - "beqz %[tempValue], 0b\n" - "nop\n" - "sync\n" - ".set pop\n" - : [originalValue] "=&r" (originalValue), - [tempValue] "=&r" (tempValue), - [_q_value] "+m" (_q_value) - : [newValue] "r" (newValue) - : "cc", "memory"); - return originalValue; -} - -inline int QBasicAtomicInt::fetchAndStoreRelease(int newValue) -{ - register int originalValue; - register int tempValue; - asm volatile(".set push\n" - SET_MIPS2 - "sync\n" - "0:\n" - "ll %[originalValue], %[_q_value]\n" - "move %[tempValue], %[newValue]\n" - "sc %[tempValue], %[_q_value]\n" - "beqz %[tempValue], 0b\n" - "nop\n" - ".set pop\n" - : [originalValue] "=&r" (originalValue), - [tempValue] "=&r" (tempValue), - [_q_value] "+m" (_q_value) - : [newValue] "r" (newValue) - : "cc", "memory"); - return originalValue; -} - -inline int QBasicAtomicInt::fetchAndStoreOrdered(int newValue) -{ - return fetchAndStoreAcquire(newValue); -} - -inline int QBasicAtomicInt::fetchAndAddRelaxed(int valueToAdd) -{ - register int originalValue; - register int newValue; - asm volatile(".set push\n" - SET_MIPS2 - "0:\n" - "ll %[originalValue], %[_q_value]\n" + register T originalValue; + register T newValue; + asm volatile("0:\n" + "lld %[originalValue], %[_q_value]\n" "addu %[newValue], %[originalValue], %[valueToAdd]\n" - "sc %[newValue], %[_q_value]\n" + "scd %[newValue], %[_q_value]\n" "beqz %[newValue], 0b\n" "nop\n" - ".set pop\n" : [originalValue] "=&r" (originalValue), [_q_value] "+m" (_q_value), [newValue] "=&r" (newValue) - : [valueToAdd] "r" (valueToAdd) + : [valueToAdd] "r" (valueToAdd * QAtomicAdditiveType::AddScale) : "cc", "memory"); return originalValue; } -inline int QBasicAtomicInt::fetchAndAddAcquire(int valueToAdd) -{ - register int originalValue; - register int newValue; - asm volatile(".set push\n" - SET_MIPS2 - "0:\n" - "ll %[originalValue], %[_q_value]\n" - "addu %[newValue], %[originalValue], %[valueToAdd]\n" - "sc %[newValue], %[_q_value]\n" - "beqz %[newValue], 0b\n" - "nop\n" - "sync\n" - ".set pop\n" - : [originalValue] "=&r" (originalValue), - [_q_value] "+m" (_q_value), - [newValue] "=&r" (newValue) - : [valueToAdd] "r" (valueToAdd) - : "cc", "memory"); - return originalValue; -} +#endif // MIPS64 -inline int QBasicAtomicInt::fetchAndAddRelease(int valueToAdd) -{ - register int originalValue; - register int newValue; - asm volatile(".set push\n" - SET_MIPS2 - "sync\n" - "0:\n" - "ll %[originalValue], %[_q_value]\n" - "addu %[newValue], %[originalValue], %[valueToAdd]\n" - "sc %[newValue], %[_q_value]\n" - "beqz %[newValue], 0b\n" - "nop\n" - ".set pop\n" - : [originalValue] "=&r" (originalValue), - [_q_value] "+m" (_q_value), - [newValue] "=&r" (newValue) - : [valueToAdd] "r" (valueToAdd) - : "cc", "memory"); - return originalValue; -} - -inline int QBasicAtomicInt::fetchAndAddOrdered(int valueToAdd) -{ - return fetchAndAddAcquire(valueToAdd); -} - -#if defined(__LP64__) -# define LLP "lld" -# define SCP "scd" #else -# define LLP "ll" -# define SCP "sc" -#endif - -template -Q_INLINE_TEMPLATE bool QBasicAtomicPointer::testAndSetRelaxed(T *expectedValue, T *newValue) -{ - register T *result; - register T *tempValue; - asm volatile(".set push\n" - SET_MIPS2 - "0:\n" - LLP" %[result], %[_q_value]\n" - "xor %[result], %[result], %[expectedValue]\n" - "bnez %[result], 0f\n" - "nop\n" - "move %[tempValue], %[newValue]\n" - SCP" %[tempValue], %[_q_value]\n" - "beqz %[tempValue], 0b\n" - "nop\n" - "0:\n" - ".set pop\n" - : [result] "=&r" (result), - [tempValue] "=&r" (tempValue), - [_q_value] "+m" (_q_value) - : [expectedValue] "r" (expectedValue), - [newValue] "r" (newValue) - : "cc", "memory"); - return result == 0; -} - -template -Q_INLINE_TEMPLATE bool QBasicAtomicPointer::testAndSetAcquire(T *expectedValue, T *newValue) -{ - register T *result; - register T *tempValue; - asm volatile(".set push\n" - SET_MIPS2 - "0:\n" - LLP" %[result], %[_q_value]\n" - "xor %[result], %[result], %[expectedValue]\n" - "bnez %[result], 0f\n" - "nop\n" - "move %[tempValue], %[newValue]\n" - SCP" %[tempValue], %[_q_value]\n" - "beqz %[tempValue], 0b\n" - "nop\n" - "sync\n" - "0:\n" - ".set pop\n" - : [result] "=&r" (result), - [tempValue] "=&r" (tempValue), - [_q_value] "+m" (_q_value) - : [expectedValue] "r" (expectedValue), - [newValue] "r" (newValue) - : "cc", "memory"); - return result == 0; -} - -template -Q_INLINE_TEMPLATE bool QBasicAtomicPointer::testAndSetRelease(T *expectedValue, T *newValue) -{ - register T *result; - register T *tempValue; - asm volatile(".set push\n" - SET_MIPS2 - "sync\n" - "0:\n" - LLP" %[result], %[_q_value]\n" - "xor %[result], %[result], %[expectedValue]\n" - "bnez %[result], 0f\n" - "nop\n" - "move %[tempValue], %[newValue]\n" - SCP" %[tempValue], %[_q_value]\n" - "beqz %[tempValue], 0b\n" - "nop\n" - "0:\n" - ".set pop\n" - : [result] "=&r" (result), - [tempValue] "=&r" (tempValue), - [_q_value] "+m" (_q_value) - : [expectedValue] "r" (expectedValue), - [newValue] "r" (newValue) - : "cc", "memory"); - return result == 0; -} - -template -Q_INLINE_TEMPLATE bool QBasicAtomicPointer::testAndSetOrdered(T *expectedValue, T *newValue) -{ - return testAndSetAcquire(expectedValue, newValue); -} - -template -Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndStoreRelaxed(T *newValue) -{ - register T *originalValue; - register T *tempValue; - asm volatile(".set push\n" - SET_MIPS2 - "0:\n" - LLP" %[originalValue], %[_q_value]\n" - "move %[tempValue], %[newValue]\n" - SCP" %[tempValue], %[_q_value]\n" - "beqz %[tempValue], 0b\n" - "nop\n" - ".set pop\n" - : [originalValue] "=&r" (originalValue), - [tempValue] "=&r" (tempValue), - [_q_value] "+m" (_q_value) - : [newValue] "r" (newValue) - : "cc", "memory"); - return originalValue; -} - -template -Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndStoreAcquire(T *newValue) -{ - register T *originalValue; - register T *tempValue; - asm volatile(".set push\n" - SET_MIPS2 - "0:\n" - LLP" %[originalValue], %[_q_value]\n" - "move %[tempValue], %[newValue]\n" - SCP" %[tempValue], %[_q_value]\n" - "beqz %[tempValue], 0b\n" - "nop\n" - "sync\n" - ".set pop\n" - : [originalValue] "=&r" (originalValue), - [tempValue] "=&r" (tempValue), - [_q_value] "+m" (_q_value) - : [newValue] "r" (newValue) - : "cc", "memory"); - return originalValue; -} - -template -Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndStoreRelease(T *newValue) -{ - register T *originalValue; - register T *tempValue; - asm volatile(".set push\n" - SET_MIPS2 - "sync\n" - "0:\n" - LLP" %[originalValue], %[_q_value]\n" - "move %[tempValue], %[newValue]\n" - SCP" %[tempValue], %[_q_value]\n" - "beqz %[tempValue], 0b\n" - "nop\n" - ".set pop\n" - : [originalValue] "=&r" (originalValue), - [tempValue] "=&r" (tempValue), - [_q_value] "+m" (_q_value) - : [newValue] "r" (newValue) - : "cc", "memory"); - return originalValue; -} - -template -Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndStoreOrdered(T *newValue) -{ - return fetchAndStoreAcquire(newValue); -} - -template -Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndAddRelaxed(qptrdiff valueToAdd) -{ - register T *originalValue; - register T *newValue; - asm volatile(".set push\n" - SET_MIPS2 - "0:\n" - LLP" %[originalValue], %[_q_value]\n" - "addu %[newValue], %[originalValue], %[valueToAdd]\n" - SCP" %[newValue], %[_q_value]\n" - "beqz %[newValue], 0b\n" - "nop\n" - ".set pop\n" - : [originalValue] "=&r" (originalValue), - [_q_value] "+m" (_q_value), - [newValue] "=&r" (newValue) - : [valueToAdd] "r" (valueToAdd * sizeof(T)) - : "cc", "memory"); - return originalValue; -} - -template -Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndAddAcquire(qptrdiff valueToAdd) -{ - register T *originalValue; - register T *newValue; - asm volatile(".set push\n" - SET_MIPS2 - "0:\n" - LLP" %[originalValue], %[_q_value]\n" - "addu %[newValue], %[originalValue], %[valueToAdd]\n" - SCP" %[newValue], %[_q_value]\n" - "beqz %[newValue], 0b\n" - "nop\n" - "sync\n" - ".set pop\n" - : [originalValue] "=&r" (originalValue), - [_q_value] "+m" (_q_value), - [newValue] "=&r" (newValue) - : [valueToAdd] "r" (valueToAdd * sizeof(T)) - : "cc", "memory"); - return originalValue; -} - -template -Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndAddRelease(qptrdiff valueToAdd) -{ - register T *originalValue; - register T *newValue; - asm volatile(".set push\n" - SET_MIPS2 - "sync\n" - "0:\n" - LLP" %[originalValue], %[_q_value]\n" - "addu %[newValue], %[originalValue], %[valueToAdd]\n" - SCP" %[newValue], %[_q_value]\n" - "beqz %[newValue], 0b\n" - "nop\n" - ".set pop\n" - : [originalValue] "=&r" (originalValue), - [_q_value] "+m" (_q_value), - [newValue] "=&r" (newValue) - : [valueToAdd] "r" (valueToAdd * sizeof(T)) - : "cc", "memory"); - return originalValue; -} - -template -Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndAddOrdered(qptrdiff valueToAdd) -{ - return fetchAndAddAcquire(valueToAdd); -} - -#else // !Q_CC_GNU - -extern "C" { - Q_CORE_EXPORT int q_atomic_test_and_set_int(volatile int *ptr, int expected, int newval); - Q_CORE_EXPORT int q_atomic_test_and_set_acquire_int(volatile int *ptr, int expected, int newval); - Q_CORE_EXPORT int q_atomic_test_and_set_release_int(volatile int *ptr, int expected, int newval); - Q_CORE_EXPORT int q_atomic_test_and_set_ptr(volatile void *ptr, void *expected, void *newval); - Q_CORE_EXPORT int q_atomic_test_and_set_acquire_ptr(volatile void *ptr, void *expected, void *newval); - Q_CORE_EXPORT int q_atomic_test_and_set_release_ptr(volatile void *ptr, void *expected, void *newval); -} // extern "C" - -inline bool QBasicAtomicInt::ref() -{ - register int expected; - for (;;) { - expected = _q_value; - if (q_atomic_test_and_set_int(&_q_value, expected, expected + 1)) - break; - } - return expected != -1; -} - -inline bool QBasicAtomicInt::deref() -{ - register int expected; - for (;;) { - expected = _q_value; - if (q_atomic_test_and_set_int(&_q_value, expected, expected - 1)) - break; - } - return expected != 1; -} - -inline bool QBasicAtomicInt::testAndSetRelaxed(int expectedValue, int newValue) -{ - return q_atomic_test_and_set_int(&_q_value, expectedValue, newValue) != 0; -} - -inline bool QBasicAtomicInt::testAndSetAcquire(int expectedValue, int newValue) -{ - return q_atomic_test_and_set_acquire_int(&_q_value, expectedValue, newValue) != 0; -} - -inline bool QBasicAtomicInt::testAndSetRelease(int expectedValue, int newValue) -{ - return q_atomic_test_and_set_release_int(&_q_value, expectedValue, newValue) != 0; -} - -inline bool QBasicAtomicInt::testAndSetOrdered(int expectedValue, int newValue) -{ - return q_atomic_test_and_set_acquire_int(&_q_value, expectedValue, newValue) != 0; -} - -inline int QBasicAtomicInt::fetchAndStoreRelaxed(int newValue) -{ - int returnValue; - for (;;) { - returnValue = _q_value; - if (testAndSetRelaxed(returnValue, newValue)) - break; - } - return returnValue; -} - -inline int QBasicAtomicInt::fetchAndStoreAcquire(int newValue) -{ - int returnValue; - for (;;) { - returnValue = _q_value; - if (testAndSetAcquire(returnValue, newValue)) - break; - } - return returnValue; -} - -inline int QBasicAtomicInt::fetchAndStoreRelease(int newValue) -{ - int returnValue; - for (;;) { - returnValue = _q_value; - if (testAndSetRelease(returnValue, newValue)) - break; - } - return returnValue; -} - -inline int QBasicAtomicInt::fetchAndStoreOrdered(int newValue) -{ - int returnValue; - for (;;) { - returnValue = _q_value; - if (testAndSetOrdered(returnValue, newValue)) - break; - } - return returnValue; -} - -inline int QBasicAtomicInt::fetchAndAddRelaxed(int valueToAdd) -{ - int returnValue; - for (;;) { - returnValue = _q_value; - if (testAndSetRelaxed(returnValue, returnValue + valueToAdd)) - break; - } - return returnValue; -} - -inline int QBasicAtomicInt::fetchAndAddAcquire(int valueToAdd) -{ - int returnValue; - for (;;) { - returnValue = _q_value; - if (testAndSetAcquire(returnValue, returnValue + valueToAdd)) - break; - } - return returnValue; -} - -inline int QBasicAtomicInt::fetchAndAddRelease(int valueToAdd) -{ - int returnValue; - for (;;) { - returnValue = _q_value; - if (testAndSetRelease(returnValue, returnValue + valueToAdd)) - break; - } - return returnValue; -} - -inline int QBasicAtomicInt::fetchAndAddOrdered(int valueToAdd) -{ - int returnValue; - for (;;) { - returnValue = _q_value; - if (testAndSetOrdered(returnValue, returnValue + valueToAdd)) - break; - } - return returnValue; -} - -template -Q_INLINE_TEMPLATE bool QBasicAtomicPointer::testAndSetRelaxed(T *expectedValue, T *newValue) -{ - return q_atomic_test_and_set_ptr(&_q_value, expectedValue, newValue) != 0; -} - -template -Q_INLINE_TEMPLATE bool QBasicAtomicPointer::testAndSetAcquire(T *expectedValue, T *newValue) -{ - return q_atomic_test_and_set_acquire_ptr(&_q_value, expectedValue, newValue) != 0; -} - -template -Q_INLINE_TEMPLATE bool QBasicAtomicPointer::testAndSetRelease(T *expectedValue, T *newValue) -{ - return q_atomic_test_and_set_release_ptr(&_q_value, expectedValue, newValue) != 0; -} - -template -Q_INLINE_TEMPLATE bool QBasicAtomicPointer::testAndSetOrdered(T *expectedValue, T *newValue) -{ - return q_atomic_test_and_set_acquire_ptr(&_q_value, expectedValue, newValue) != 0; -} - -template -Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndStoreRelaxed(T *newValue) -{ - T *returnValue; - for (;;) { - returnValue = (_q_value); - if (testAndSetRelaxed(returnValue, newValue)) - break; - } - return returnValue; -} - -template -Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndStoreAcquire(T *newValue) -{ - T *returnValue; - for (;;) { - returnValue = (_q_value); - if (testAndSetAcquire(returnValue, newValue)) - break; - } - return returnValue; -} - -template -Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndStoreRelease(T *newValue) -{ - T *returnValue; - for (;;) { - returnValue = (_q_value); - if (testAndSetRelease(returnValue, newValue)) - break; - } - return returnValue; -} - -template -Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndStoreOrdered(T *newValue) -{ - T *returnValue; - for (;;) { - returnValue = (_q_value); - if (testAndSetOrdered(returnValue, newValue)) - break; - } - return returnValue; -} - -template -Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndAddRelaxed(qptrdiff valueToAdd) -{ - T *returnValue; - for (;;) { - returnValue = (_q_value); - if (testAndSetRelaxed(returnValue, returnValue + valueToAdd)) - break; - } - return returnValue; -} - -template -Q_INLINE_TEMPLATE -T *QBasicAtomicPointer::fetchAndAddAcquire(qptrdiff valueToAdd) -{ - T *returnValue; - for (;;) { - returnValue = (_q_value); - if (testAndSetAcquire(returnValue, returnValue + valueToAdd)) - break; - } - return returnValue; -} - -template -Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndAddRelease(qptrdiff valueToAdd) -{ - T *returnValue; - for (;;) { - returnValue = (_q_value); - if (testAndSetRelease(returnValue, returnValue + valueToAdd)) - break; - } - return returnValue; -} - -template -Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndAddOrdered(qptrdiff valueToAdd) -{ - T *returnValue; - for (;;) { - returnValue = (_q_value); - if (testAndSetOrdered(returnValue, returnValue + valueToAdd)) - break; - } - return returnValue; -} - +# error "This compiler for MIPS is not supported" #endif // Q_CC_GNU QT_END_NAMESPACE diff --git a/src/corelib/thread/qbasicatomic.h b/src/corelib/thread/qbasicatomic.h index 198eed435d..89192a5e91 100644 --- a/src/corelib/thread/qbasicatomic.h +++ b/src/corelib/thread/qbasicatomic.h @@ -52,6 +52,8 @@ # include #elif defined(__i386) || defined(__i386__) # include +#elif defined(__mips) || defined(__mips__) +# include "QtCore/qatomic_mips.h" #elif defined(__x86_64) || defined(__x86_64__) || defined(__amd64) # include #else