From 9cc7f233c9e2f2bacdcb06f166d0812d58eb4bfc Mon Sep 17 00:00:00 2001 From: Thiago Macieira Date: Tue, 22 Jun 2021 09:21:19 -0700 Subject: [PATCH] qsimd: Don't force RDRND on if __AVX2__ Like AESNI, RDRAND is an optional extra feature that is not always enabled in all parts. Probably something to do with export restrictions, but I've only seen that in low-end parts. Drive-by removal of "AES" where it was no longer relevant. Pick-to: 6.2 Change-Id: I7246c3e7bb894e0d9521fffd168af3fc0fb638a1 Reviewed-by: Allan Sandfeld Jensen --- src/corelib/global/qsimd_p.h | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/src/corelib/global/qsimd_p.h b/src/corelib/global/qsimd_p.h index cdb2a74cd1..35979176fa 100644 --- a/src/corelib/global/qsimd_p.h +++ b/src/corelib/global/qsimd_p.h @@ -204,18 +204,17 @@ // AVX intrinsics # if defined(__AVX__) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS) && (defined(Q_CC_INTEL) || defined(Q_CC_MSVC)) -// AES, PCLMULQDQ instructions: +// PCLMULQDQ instructions: // All processors that support AVX support PCLMULQDQ // (but neither MSVC nor the Intel compiler define this macro) # define __PCLMUL__ 1 # endif # if defined(__AVX2__) && defined(QT_COMPILER_SUPPORTS_SIMD_ALWAYS) && (defined(Q_CC_INTEL) || defined(Q_CC_MSVC)) -// F16C & RDRAND instructions: -// All processors that support AVX2 support F16C & RDRAND: -// (but neither MSVC nor the Intel compiler define these macros) +// F16C instructions: +// All processors that support AVX2 support F16C: +// (but neither MSVC nor the Intel compiler define this macro) # define __F16C__ 1 -# define __RDRND__ 1 # endif # if defined(__BMI__) && !defined(__BMI2__) && defined(Q_CC_INTEL)