Disable 64-bit atomics on 32-bit x86

At least with GCC, the use of cmpxchg8b in inline assembly is
unreliable. The instruction requires 5 registers to be used and
sometimes GCC complains that it runs out of them.

qatomic_x86.h:424:33: error: can’t find a register in class ‘GENERAL_REGS’ while reloading ‘asm’
qatomic_x86.h:424:33: error: ‘asm’ operand has impossible constraints

Change-Id: Ie5414f3bccc6e559c7eec93beabe8663ab40271f
Reviewed-by: Olivier Goffart <ogoffart@woboq.com>
bb10
Thiago Macieira 2013-12-06 18:09:05 -08:00 committed by The Qt Project
parent 2a32fc38dd
commit fca917c1cc
1 changed files with 2 additions and 1 deletions

View File

@ -339,6 +339,8 @@ T QBasicAtomicOps<1>::fetchAndAddRelaxed(T &_q_value, typename QAtomicAdditiveTy
#define Q_ATOMIC_INT16_FETCH_AND_ADD_IS_ALWAYS_NATIVE
#define Q_ATOMIC_INT16_FETCH_AND_ADD_IS_WAIT_FREE
#ifdef Q_PROCESSOR_X86_64
#define Q_ATOMIC_INT64_IS_SUPPORTED
#define Q_ATOMIC_INT64_REFERENCE_COUNTING_IS_ALWAYS_NATIVE
@ -353,7 +355,6 @@ T QBasicAtomicOps<1>::fetchAndAddRelaxed(T &_q_value, typename QAtomicAdditiveTy
#define Q_ATOMIC_INT64_FETCH_AND_ADD_IS_ALWAYS_NATIVE
#define Q_ATOMIC_INT64_FETCH_AND_ADD_IS_WAIT_FREE
#ifdef Q_PROCESSOR_X86_64
// native support for 64-bit types
template<> template<typename T> inline
bool QBasicAtomicOps<8>::ref(T &_q_value) Q_DECL_NOTHROW